Project TitleEnhanced Performance for Graphical Processing Unit
Track CodeLSu-2016-037
Short Description

Hardware Transactional Memory (HTM) is a way to improve the programmability of parallel computing architectures. HTM has been integrated into modern Computer Processing Units (CPUs) and work is currently being done to apply this technology to Graphics Processing Units (GPUs). This invention is a hardware addition to a previously developed HTM system for GPUs, WarpTM/KiloTM, that improves processing speed and power consumption by addressing potentially conflicting transactions early in the process.

These improvements are achieved by two methods: Pause and Go and Early Abort. Pause and Go stalls potentially conflicting transactions during execution of the transaction alleviating the need to restart the transaction. The Early Abort method allows transactions to be aborted before they begin the process of being written to memory. Both these methods are implemented with the addition of two address indexed lookup tables to the SIMT Core and Commit Unit.


It has been proposed that Transactional Memory be added to Graphics Processing Units (GPUs) in recent years. One proposed hardware design, Warp TM, can scale to 1000s of concurrent transactions. As a programming method that can atomicize an arbitrary number of memory access locations and greatly reduce the efforts to program parallel applications, transactional memory handles the complexity of inter thread synchronization. However, when thousands of transactions run concurrently on a GPU, conflicts and resource contentions arise, causing performance loss.

Researchers have identified and analyzed the cause of conflicts and contentions and propose two enhancements that try to resolve conflicts early: (1)Early-Abort global conflict resolution that allows conflicts to be detected before they reach the Commit Units so that contention in the Commit Units is reduced and (2) Pause-and-Go execution scheme that reduces the chance of conflict and the performance penalty of re-executing long transactions. These two enhancements are enabled by a single hardware modification. Our evaluation shows the combination of the two enhancements greatly improves overall execution speed while reducing energy consumption.

TagsComputer processing units, transactional memory, graphic processing units;
Posted DateJun 13, 2017 3:01 PM


  • 40% processing speed increase over WarpTM
  • 20% reduction in power consumption compared to WarpTM
  • Can be modified to work with different transactional memory systems


  • Transactional Memory Systems for GPUs

Licensing Contact


File Name Description
S. Chen and L. Peng, "Efficient GPU Hardware Transactional Memory through Early Conflict Resolution," In Proceedings of the 22nd IEEE International Symposium on High-Performance Computer Architecture (HPCA), Barcelona, Spain, Mar. 2016 None Download
LSU-2016-037 Tech Summary None Download

Intellectual Property

Patent Number Issue Date Type Country of Filing
Patent Pending None Provisional United States